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Buzzer circuit theory!
PORTC.3 / T0 as the I / O port through the transistor Q2 to drive the buzzer LS1, and PORTC.2 / PWM0 as a PWM output through the transistor Q1 to drive the buzzer LS2. In addition PORTA.3 and PORTA.2 were two buttons, one is the PWM button, is used to control the PWM output driver buzzer; the other is the PORT button, is used to control the I / O port driver Buzzer used. Connect the I / O port of the button to turn on the internal pull-up resistor.
Software design method
First analyze the buzzer. The working frequency of the buzzer used is 2000Hz, that is to say the buzzer's driving signal waveform period is 500μs. Because it is a 1/2 duty signal, the time widths of the high level and the low level in one cycle are both 250μs. Software design, we will be based on two kinds of drivers to explain.
PWM output directly drive buzzer way
Because PWM controls only the fixed-frequency buzzer, the PWM output waveform can be set at system initialization of the program.
First of all, according to SH69P43 PWM output cycle width is 10-bit data to select the PWM clock. The system uses a 4MHz crystal oscillator as the main oscillator, a tosc time is 0.25μs, if the PWM clock is set to tosc, then the buzzer waveform cycle 500μs count value is 500μs / 0.25μs = (2000) 10 = (7D0) 16, 7D0H is 11-bit data, and SH69P43 PWM
The output cycle width is only 10-bit data, so selecting the PWM clock for tosc can not achieve the desired drive waveform for the buzzer.
Here we will PWM clock is set to 4tosc, such a PWM clock cycle is 1μs, which can be calculated 500μs corresponding to the count value of 500μs / 1μs = (500) 10 = (1F4) 16, which are in the cycle register The upper 2 bits, the lower 4 bits and the lower 4 bits are filled with 1, F and 4 to complete the setting of the output period. And then set the duty cycle register, duty cycle in the PWM output is achieved
By setting the width of the level of a cycle to achieve. When the output mode is selected as normal mode, the duty cycle register is used to set the high level width. The 250μs width count is 250μs / 1μs = (250) 10 = (0FA) 16. Only need to fill 0, F and A in the high 2 bits, middle 4 bits and low 4 bits of the Duty Cycle register to finish the setting of the duty ratio, and set the duty cycle as 1/2 duty.
After the only need to open the PWM output, PWM output will naturally be able to output a frequency of 2000Hz, duty cycle 1 / 2duty square wave.
2.I / O port timing flip level drive buzzer mode
Using the I / O port timing flip level drive buzzer setting is relatively simple, only need to analyze the waveform. Since the driving signal is exactly a square wave with a period of 500μs and a duty cycle of 1/2 duty, it only needs to invert the level every 250μs to obtain the square wave signal for driving the buzzer. Programmatically, TIMER0 can be used for timing, TIMER0 prescaler can be set as / 1, TIMER0 can be selected as always system clock (main oscillator clock / 4), high 4 bits of TIMER0 load / counter register Lower 4 bits are written to 00H and 06H, TIMER0 interrupt can be set to 250μs. When the buzzer that needs I / O port driver is beeping, only need to turn the level of this I / O port once when entering TIMER0 interrupt, until the buzzer does not need to be tweeting, the I / O port The level is set to low level. Do not call the I / O port output level is set to low in order to prevent leakage.